Mixed-signal system modeling methodology with VHDL-AMS

Abstract

High-level synthesis is highly demanded for managing the complexity of mixed-signal system designs. However, synthesis methods are currently in their infancy before the VHDL-AMS. The absence of a high-level specification notation is an important limitation for the development of efficient synthesis methods. VHDL-AMS which is built on IEEE Std. 1076-1993 (VHDL) is the IEEE 1076.1-1999 language, a hardware description language for the description and the simulation of analog, digital, and mixed-signal systems. This paper introduces the modeling characteristics supported by VHDL-AMS, analyzes modeling methodology of the mixed-signal system and some issues about modeling methods. Finally the paper builds the mixed-signal system modeling and simulation through examples