{"title":"Practical design of globally-asynchronous locally-synchronous systems","authors":"J. Muttersbach, T. Villiger, W. Fichtner","doi":"10.1109/ASYNC.2000.836791","DOIUrl":null,"url":null,"abstract":"In this paper we describe a complete design methodology for a globally asynchronous on-chip communication network connecting both locally-synchronous and asynchronous modules. Synchronous modules are equipped with asynchronous wrappers which adapt their interfaces to the self-timed environment and prevent metastability. These wrappers are assembled from a concise library of predesigned technology-independent elements and provide high-speed data transfer. We confirmed the validity of our concept by applying it to an ASIC design implementing the Safer crypto-algorithm.","PeriodicalId":127481,"journal":{"name":"Proceedings Sixth International Symposium on Advanced Research in Asynchronous Circuits and Systems (ASYNC 2000) (Cat. No. PR00586)","volume":"128 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2000-04-02","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"308","resultStr":null,"platform":"Semanticscholar","paperid":null,"PeriodicalName":"Proceedings Sixth International Symposium on Advanced Research in Asynchronous Circuits and Systems (ASYNC 2000) (Cat. No. PR00586)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/ASYNC.2000.836791","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
引用次数: 308
Abstract
In this paper we describe a complete design methodology for a globally asynchronous on-chip communication network connecting both locally-synchronous and asynchronous modules. Synchronous modules are equipped with asynchronous wrappers which adapt their interfaces to the self-timed environment and prevent metastability. These wrappers are assembled from a concise library of predesigned technology-independent elements and provide high-speed data transfer. We confirmed the validity of our concept by applying it to an ASIC design implementing the Safer crypto-algorithm.