An experimental 2.488 gigabit/sec SONET STS-3c to STS-48 byte multiplexer and demultiplexer

M. Bagheri, D. Kong, W. Holden, F. C. Irizarry, D. Mahoney, D. C. Larson
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引用次数: 2

Abstract

To study the key technical issues in SONET (synchronous optical network byte multiplexing at gigabit/s data rates and the interworking of SONET and other broadband network elements, the authors implemented an experimental SONET STS-48 (synchronous transport signal) (2.488 Gb/s) testbed with broadband user interfaces (STS-3c and higher data rates). The testbed includes a SONET-compatible experimental STS-3c to STS-48 byte multiplexer and demultiplexer. A description is presented of the architecture, implementation, and experimental results of the high-speed components of the byte multiplexer and demultiplexer. The implementation employs a combination of custom VLSI integrated circuits and off-the-shelf components for rapid prototyping and verifying the validity of the architecture.<>
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一个实验性的2.488千兆/秒SONET STS-3c到STS-48字节多路复用器和解路复用器
为了研究SONET(同步光网络千兆数据速率的字节复用)中的关键技术问题以及SONET与其他宽带网络元件的互通,作者实现了具有宽带用户接口(STS-3c及更高数据速率)的SONET STS-48(同步传输信号)(2.488 Gb/s)实验试验台。测试平台包括一个兼容sonet的实验STS-3c到STS-48字节多路复用器和解路复用器。介绍了字节多路复用器和字节多路复用器高速组件的结构、实现和实验结果。该实现采用定制VLSI集成电路和现成组件的组合,用于快速原型设计和验证架构的有效性。
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