Iliana Fujimori-Chen, B. Walker, Roxann Broughton-Blanchard, E. Balboni
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引用次数: 2
Abstract
This paper presents a broadband, high-dynamic range, active mixer with integrated PLL and VCO. The synthesizer uses a programmable integer-n/fractional-n PLL to generate an LO signal with an in-band phase noise FOM of −223 dBc/Hz/Hz. The 100–3000MHz active mixer can be configured for up or down conversion. The mixer's linearity can be boosted from +25dBm to +29dBm by increasing the bias current, and optimized for a wide range of input frequencies through a variable capacitor setting. Designed in Si-Ge 0.25µm BiCMOS, the entire chip occupies 5.84mm2 and consumes 250mA from a 5V supply.