M. Taherzadeh‐Sani, R. Lotfi, H. Zare-Hoseini, O. Shoaei
{"title":"A high slew-rate low-voltage low-power operational amplifier using a new current injection circuit","authors":"M. Taherzadeh‐Sani, R. Lotfi, H. Zare-Hoseini, O. Shoaei","doi":"10.1109/SCS.2003.1227094","DOIUrl":null,"url":null,"abstract":"The power consumption is the most important issue in the design of integrated circuits for mobile electronics. In this paper a new approach employing a current injection transistor to the output stage in order to inject the additional current needed for the large-signal settling in that interval and off in the remaining small-signal regime is presented. This technique decreases the power consumption in a fast-settling high-slew-rate operational amplifier driving a large capacitive load. Using this technique, a 1.8-V 3.3-mW op-amp driving a 4-pF load is designed with a 2Vp-p,diff 12-bit settling time of less than 11ns in a 0.35-μm CMOS process. HSPICE simulations confirm that this approach can reduce the power consumption by considerable amounts as high as 50%.","PeriodicalId":375963,"journal":{"name":"Signals, Circuits and Systems, 2003. SCS 2003. International Symposium on","volume":"38 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2003-07-10","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"3","resultStr":null,"platform":"Semanticscholar","paperid":null,"PeriodicalName":"Signals, Circuits and Systems, 2003. SCS 2003. International Symposium on","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/SCS.2003.1227094","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
引用次数: 3
Abstract
The power consumption is the most important issue in the design of integrated circuits for mobile electronics. In this paper a new approach employing a current injection transistor to the output stage in order to inject the additional current needed for the large-signal settling in that interval and off in the remaining small-signal regime is presented. This technique decreases the power consumption in a fast-settling high-slew-rate operational amplifier driving a large capacitive load. Using this technique, a 1.8-V 3.3-mW op-amp driving a 4-pF load is designed with a 2Vp-p,diff 12-bit settling time of less than 11ns in a 0.35-μm CMOS process. HSPICE simulations confirm that this approach can reduce the power consumption by considerable amounts as high as 50%.