{"title":"Automatic TLM generation for C-Based MPSoC design","authors":"L. L. Y. Lo, S. Abdi","doi":"10.1109/HLDVT.2007.4392781","DOIUrl":null,"url":null,"abstract":"This paper presents a tool for automatic generation of transaction level models (TLMs)for MPSoC designs using only C-code and graphical capture. The MPSoC platform is captured as a graphical net-list of components, busses and bridge elements. The application is captured as C processes mapped to the platform components. Once the platform is decided, a set of transaction level communication APIs is automatically generated for each process. After the C code is input, an executable SystemC TLM of the design is automatically generated using our tool. This TLM can be executed using standard SystemC simulators for early functional verification of the design. Although, several TLM styles and standards have been proposed in the past, our approach differs in the fact that the designers do not need to understand the underlying SystemC code or TLM modeling style to verify that their application executes on the selected platform. Moreover, the platform can be easily modified and a new TLM for that platform can be automatically generated. Our experimental results demonstrate that for large industrial applications such as MP3 decoder and H.264, high-speed TLMs can be generated for a wide variety of platforms in a few seconds.","PeriodicalId":339324,"journal":{"name":"2007 IEEE International High Level Design Validation and Test Workshop","volume":"12 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2007-11-07","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"0","resultStr":null,"platform":"Semanticscholar","paperid":null,"PeriodicalName":"2007 IEEE International High Level Design Validation and Test Workshop","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/HLDVT.2007.4392781","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
引用次数: 0
Abstract
This paper presents a tool for automatic generation of transaction level models (TLMs)for MPSoC designs using only C-code and graphical capture. The MPSoC platform is captured as a graphical net-list of components, busses and bridge elements. The application is captured as C processes mapped to the platform components. Once the platform is decided, a set of transaction level communication APIs is automatically generated for each process. After the C code is input, an executable SystemC TLM of the design is automatically generated using our tool. This TLM can be executed using standard SystemC simulators for early functional verification of the design. Although, several TLM styles and standards have been proposed in the past, our approach differs in the fact that the designers do not need to understand the underlying SystemC code or TLM modeling style to verify that their application executes on the selected platform. Moreover, the platform can be easily modified and a new TLM for that platform can be automatically generated. Our experimental results demonstrate that for large industrial applications such as MP3 decoder and H.264, high-speed TLMs can be generated for a wide variety of platforms in a few seconds.