Statistical and Corner Modeling of Interconnect Resistance and Capacitance

IEEE Custom Integrated Circuits Conference 2006 Pub Date : 2006-09-01 DOI:10.1109/CICC.2006.320845

N. Lu

引用次数: 10

Abstract

We describe an innovative and comprehensive interconnect Spice model for IBM 65 nm technology. The model links the variability in the model to the variations in BEOL litho, deposition, etch, and polish process steps, which is an industry first. It provides correct Monte Carlo simulation results, offers correct corner modeling capability, and can also generates a set of optimal interconnect corner models instantly without running Monte Carlo simulations, which is another industry first

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互连电阻和电容的统计和拐角建模

我们描述了IBM 65纳米技术的创新和全面的互连Spice模型。该模型将模型中的可变性与BEOL光刻、沉积、蚀刻和抛光工艺步骤的变化联系起来，这是行业首创。它提供了正确的蒙特卡罗仿真结果，提供了正确的拐角建模能力，并且还可以在不运行蒙特卡罗仿真的情况下立即生成一组最优的互连拐角模型，这是另一个行业首创

本文章由计算机程序翻译，如有差异，请以英文原文为准。

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IEEE Custom Integrated Circuits Conference 2006

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