M. Harumoto, H. Stokes, Yuji Tanaka, K. Kaneyama, C. Pieczulewski, M. Asai, I. Servin, M. Argoud, A. Gharbi, C. Lapeyre, R. Tiron, C. Monget
{"title":"Investigation of coat-develop track system for placement error of contact hole shrink process","authors":"M. Harumoto, H. Stokes, Yuji Tanaka, K. Kaneyama, C. Pieczulewski, M. Asai, I. Servin, M. Argoud, A. Gharbi, C. Lapeyre, R. Tiron, C. Monget","doi":"10.1117/12.2219925","DOIUrl":null,"url":null,"abstract":"Directed Self-Assembly (DSA) is a well-known candidate for next generation sub-15nm half-pitch lithography. [1-2] DSA processes on 300mm wafers have been demonstrated for several years, and have given a strong impression due to finer pattern results. [3-4] On t he other hand, specific issues with DSA processes have begun to be clear as a result of these recent challenges. [5-6] Pattern placement error, which means the pattern shift after DSA fabrication, is recognized as one of these typical issues. Coat-Develop Track systems contribute to the DSA pattern fabrication and also influence the DSA pattern performance.[4] In this study, the placement error was investigated using a simple contact-hole pattern and subsequent contact-hole shrink process implemented on the SOKUDO DUO track. Thus, we will show the placement error of contact-hole shrink using a DSA process and discuss the difference between DSA and other shrink methods.","PeriodicalId":193904,"journal":{"name":"SPIE Advanced Lithography","volume":"29 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2016-04-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"2","resultStr":null,"platform":"Semanticscholar","paperid":null,"PeriodicalName":"SPIE Advanced Lithography","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1117/12.2219925","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
引用次数: 2
Abstract
Directed Self-Assembly (DSA) is a well-known candidate for next generation sub-15nm half-pitch lithography. [1-2] DSA processes on 300mm wafers have been demonstrated for several years, and have given a strong impression due to finer pattern results. [3-4] On t he other hand, specific issues with DSA processes have begun to be clear as a result of these recent challenges. [5-6] Pattern placement error, which means the pattern shift after DSA fabrication, is recognized as one of these typical issues. Coat-Develop Track systems contribute to the DSA pattern fabrication and also influence the DSA pattern performance.[4] In this study, the placement error was investigated using a simple contact-hole pattern and subsequent contact-hole shrink process implemented on the SOKUDO DUO track. Thus, we will show the placement error of contact-hole shrink using a DSA process and discuss the difference between DSA and other shrink methods.