Non-invasive timing analysis of IBM G6 microprocessor L1 cache using picosecond imaging circuit analysis

Abstract

The new non-invasive backside timing characterization technique, Picosecond Imaging Circuit Analysis (PICA), was applied to the identification and analysis of a race condition which occurred in an early design of the L1 cache of the S/390 microprocessor. The circuit switching activity was visualized in reconstructed slow motion videos of passing and failing conditions. An automated emission waveform extraction and analysis tool was used to perform a quantitative study of the failing condition.