A CMOS charge pump with dual compensation amplifiers for phase-locked loops synthesizer

Abstract

A Charge Pump (CP) circuit that minimizes the mismatch between the charging and discharging currents and keeps the currents constant across a wide output voltage range is introduced in this paper. Dual rail-to-rail operational amplifiers are used to enable the CP's charge and discharge currents to be matched well and mitigate the pump-current variation in a wide output range. Besides, a unity-gain amplifier is adopted to eliminate the current sharing effect. The proposed CP circuit is designed and realized in a 0.18-μm CMOS process. The test results show that the current mismatch rate can be less than 1% in the output voltage range of 0.2 V to 1.7 V with the charge pump current of 50 μA and current variation less than 1.2%. The average power consumption of this circuits is about 0.72 mW under a 1.8 V supply voltage.