{"title":"Progressive transmission line matching when encountering via mismatching","authors":"M. Daraban, D. Pitica","doi":"10.1109/SIITME.2013.6743659","DOIUrl":null,"url":null,"abstract":"When it comes to transmission lines the common causes for signal integrity (SI) problems are the mismatches caused during the routing process. From all the possible causes for mismatches, vias are the most common ones. In the literature, different approaches are proposed to resolve the SI problems caused by vias: stitching vias, matching the driver output impedance to the transmission line's new value [1]. Stitching vias can be used when printed circuit boards (PCBs) are used with more than four layers. Additionally a smaller value for the series-matching resistor improves the signal rise/fall time, but also increases the ringing effect's amplitude. In the paper, a solution for improving the signal at the receiver is proposed that can be used even on four layer PCB. The proposed solution keeps the improvements obtained through matching the driver output to the transmission line's modified impedance, without increasing the ringing effect amplitude.","PeriodicalId":267846,"journal":{"name":"2013 IEEE 19th International Symposium for Design and Technology in Electronic Packaging (SIITME)","volume":"16 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2013-10-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"2","resultStr":null,"platform":"Semanticscholar","paperid":null,"PeriodicalName":"2013 IEEE 19th International Symposium for Design and Technology in Electronic Packaging (SIITME)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/SIITME.2013.6743659","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
引用次数: 2
Abstract
When it comes to transmission lines the common causes for signal integrity (SI) problems are the mismatches caused during the routing process. From all the possible causes for mismatches, vias are the most common ones. In the literature, different approaches are proposed to resolve the SI problems caused by vias: stitching vias, matching the driver output impedance to the transmission line's new value [1]. Stitching vias can be used when printed circuit boards (PCBs) are used with more than four layers. Additionally a smaller value for the series-matching resistor improves the signal rise/fall time, but also increases the ringing effect's amplitude. In the paper, a solution for improving the signal at the receiver is proposed that can be used even on four layer PCB. The proposed solution keeps the improvements obtained through matching the driver output to the transmission line's modified impedance, without increasing the ringing effect amplitude.