Generic average-value modeling of MMC-HVDC links considering submodule capacitor dynamics

Abstract

The main objective of this paper is to propose a generic average-value model for the state-of-the-art modular multilevel converter (MMC) topology used in commercial high voltage dc transmission (HVDC) applications. The proposed model does not rely solely on the fundamental frequency modeling approach, but it also takes into account the expected dynamic behavior of submodule capacitors connected in series in each arm of the actual MMC circuit topology. The model includes six controlled voltage sources, connected in each converter arm, which are governed by the dynamics of an equivalent submodule capacitor, reproducing the expected voltage ripple, as well as the circulating currents induced inside each converter arm. To evaluate the accuracy of the proposed average-value MMC model, a comparative assessment is performed against the detailed switching model, via time-domain simulations in Matlab/Simulink, under normal operation and in the presence of grid faults.