Capacitor Voltage Balancing Using Redundant States for Five-Level Multilevel Inverter

Abstract

In this paper a new five-level inverter capacitor voltage balancing technique for high modulation index and high power factor operation is proposed. The proposed redundant state technique is based on dividing the space vector diagram of the five-level inverter into six three-level space vector diagrams. The original centre of the space vector diagram is shifted. New states of the space vector are determined, the dwelling time is calculated as for conventional two-level modulation, and the switching sequence is determined depending on the voltage level of the four dc link capacitors, using a redundant state method.