{"title":"Pole-Zero Analysis of Low-Dropout (LDO) Regulators: A Tutorial Overview","authors":"A. Garimella, Punith R. Surkanti, P. Furth","doi":"10.1109/VLSID.2012.38","DOIUrl":null,"url":null,"abstract":"Analyzing poles and zeros of a circuit is often essential for (a) choose the appropriate topology for given specifications, (b) understanding the frequency response of the circuit and (c) stabilizing the circuit by choosing appropriate frequency compensation techniques. Analyzing poles and zeros of a low-dropout (LDO) voltage regulator is often intriguing as (a) the voltage/current control loop need to be broken for small signal analysis and (b) the location of poles move with output load current. The objective of this tutorial is to provide a step-by-step procedure for analyzing poles and zeros in LDO regulators. To this end, two recent state-of-the-art LDO regulators from the literature are analyzed, explaining several intricacies involved. During the process, several frequency compensation techniques are elucidated.","PeriodicalId":405021,"journal":{"name":"2012 25th International Conference on VLSI Design","volume":"39 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2012-01-07","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"6","resultStr":null,"platform":"Semanticscholar","paperid":null,"PeriodicalName":"2012 25th International Conference on VLSI Design","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/VLSID.2012.38","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
引用次数: 6
Abstract
Analyzing poles and zeros of a circuit is often essential for (a) choose the appropriate topology for given specifications, (b) understanding the frequency response of the circuit and (c) stabilizing the circuit by choosing appropriate frequency compensation techniques. Analyzing poles and zeros of a low-dropout (LDO) voltage regulator is often intriguing as (a) the voltage/current control loop need to be broken for small signal analysis and (b) the location of poles move with output load current. The objective of this tutorial is to provide a step-by-step procedure for analyzing poles and zeros in LDO regulators. To this end, two recent state-of-the-art LDO regulators from the literature are analyzed, explaining several intricacies involved. During the process, several frequency compensation techniques are elucidated.