L.R. du Roscoat, J. Hourany, V. Regnauld, P. Gamand
{"title":"Substrate injection characterization in CMOS mixed signal systems on chip","authors":"L.R. du Roscoat, J. Hourany, V. Regnauld, P. Gamand","doi":"10.1109/RME.2007.4401802","DOIUrl":null,"url":null,"abstract":"With the increasing integration in consumer electronic products, complex mixed signals circuits have been developed for RF systems on chip. Digital blocks generate parasitic signals, which may affect sensitive sections, especially through substrate. This paper presents a measurement structure designed to characterize the signals injected into the substrate. Measurements of digital blocks designed with various layout options will allow to find a better layout methodology to improve isolation between design blocks in a 65nm CMOS technology.","PeriodicalId":118230,"journal":{"name":"2007 Ph.D Research in Microelectronics and Electronics Conference","volume":"34 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2007-07-02","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"2","resultStr":null,"platform":"Semanticscholar","paperid":null,"PeriodicalName":"2007 Ph.D Research in Microelectronics and Electronics Conference","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/RME.2007.4401802","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
引用次数: 2
Abstract
With the increasing integration in consumer electronic products, complex mixed signals circuits have been developed for RF systems on chip. Digital blocks generate parasitic signals, which may affect sensitive sections, especially through substrate. This paper presents a measurement structure designed to characterize the signals injected into the substrate. Measurements of digital blocks designed with various layout options will allow to find a better layout methodology to improve isolation between design blocks in a 65nm CMOS technology.