A Reconfigurable Memory PUF Based on Tristate Inverter Arrays

Abstract

A Physical Unclonable Function (PUF) is a promising security primitive for low cost security solutions. It is especially attractive for resource constrained platforms such as internet-of-things (IoT) devices. A novel Tristate Static Random Access Memory (TSRAM) PUF design consisting of two cross-coupled tristate inverter arrays is proposed in this paper. This new PUF structure is able to reconfigure the cross-coupled inverters so that it can produce effective challenge-response pairs (CRPs) without using any additional auxiliary processing, which is not available in previous memory based PUFs. The functionality and performance of the proposed TSRAM PUF is validated by both simulation with UMC 65nm technology and practical experimentation on a Xilinx Virtex-II FPGA. The proposed TSRAM PUF demonstrates good uniqueness and reliability and it uses the smallest number of gates to produce one response bit compared with previous works.