Oliver Albrecht, H. Wohlrabe, K. Meier, M. Oppermann, T. Zerna
{"title":"In-situ X-ray Characterization of IC Package Warpage at Elevated Temperatures","authors":"Oliver Albrecht, H. Wohlrabe, K. Meier, M. Oppermann, T. Zerna","doi":"10.1109/ESTC.2018.8546446","DOIUrl":null,"url":null,"abstract":"All integrated circuit (IC) packages types designed and buildup using different materials with at least little but partly very different thermal expansion coefficients. Under thermal loading, e.g. board assembly or field conditions, a deformation and shape change from the initial state often occur as warpage. During the board assembly, this warpage can cause failures such as open solder joints and/or shorts of solder joints. This warpage can be measured and quantified as co-planarity. Shadow moiré technique is an accepted and standardized measurement technique to do so. Beside the advantages of this measurement technique, there are also some disadvantages. A special preparation of the test objects is necessary - one has to flatten and to whiten the surface - and the maximum heating gradient is about 0.25 K/s in common equipment for a convection simulation. In this paper we will present a new approach to measure the warpage of IC packages using the in-situ X-ray inspection. Certain package types, such as ball grid arrays (BGA’s), are known to be more susceptible to component warpage. Hence, BGAs will be investigated for demonstration of the capability and limitations of this new in-situ measurement technique.","PeriodicalId":198238,"journal":{"name":"2018 7th Electronic System-Integration Technology Conference (ESTC)","volume":"52 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2018-09-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"1","resultStr":null,"platform":"Semanticscholar","paperid":null,"PeriodicalName":"2018 7th Electronic System-Integration Technology Conference (ESTC)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/ESTC.2018.8546446","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
引用次数: 1
Abstract
All integrated circuit (IC) packages types designed and buildup using different materials with at least little but partly very different thermal expansion coefficients. Under thermal loading, e.g. board assembly or field conditions, a deformation and shape change from the initial state often occur as warpage. During the board assembly, this warpage can cause failures such as open solder joints and/or shorts of solder joints. This warpage can be measured and quantified as co-planarity. Shadow moiré technique is an accepted and standardized measurement technique to do so. Beside the advantages of this measurement technique, there are also some disadvantages. A special preparation of the test objects is necessary - one has to flatten and to whiten the surface - and the maximum heating gradient is about 0.25 K/s in common equipment for a convection simulation. In this paper we will present a new approach to measure the warpage of IC packages using the in-situ X-ray inspection. Certain package types, such as ball grid arrays (BGA’s), are known to be more susceptible to component warpage. Hence, BGAs will be investigated for demonstration of the capability and limitations of this new in-situ measurement technique.