{"title":"A low power 13-Gb/s 2/sup 7/-1 pseudo random bit sequence generator IC in 120 nm bulk CMOS","authors":"H. Wohlmuth, D. Kehrer","doi":"10.1145/1016568.1016630","DOIUrl":null,"url":null,"abstract":"We present a pseudo random bit sequence (PRBS) generator with a sequence length of 2/sup 7/-1. The circuit uses a 7 bit full rate shift register with a linear XOR feedback and works up to data rates of 13 Gb/s. The PRBS generator features a divide by 2 trigger divider, two 3 bit shifted outputs and an autostart logic. The circuit draws 137 mA from a single 1.5 V supply. The circuit is manufactured in 120 nm bulk CMOS technology.","PeriodicalId":275811,"journal":{"name":"Proceedings. SBCCI 2004. 17th Symposium on Integrated Circuits and Systems Design (IEEE Cat. No.04TH8784)","volume":"11 1 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2004-09-04","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"20","resultStr":null,"platform":"Semanticscholar","paperid":null,"PeriodicalName":"Proceedings. SBCCI 2004. 17th Symposium on Integrated Circuits and Systems Design (IEEE Cat. No.04TH8784)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1145/1016568.1016630","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
引用次数: 20
Abstract
We present a pseudo random bit sequence (PRBS) generator with a sequence length of 2/sup 7/-1. The circuit uses a 7 bit full rate shift register with a linear XOR feedback and works up to data rates of 13 Gb/s. The PRBS generator features a divide by 2 trigger divider, two 3 bit shifted outputs and an autostart logic. The circuit draws 137 mA from a single 1.5 V supply. The circuit is manufactured in 120 nm bulk CMOS technology.
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