A Regulated-Cascode Based Current-Integrating TIA RX with 1-tap Speculative Adaptive DFE

Abstract

In this paper, an energy efficient receiver(Rx) with a regulated-cascode based current-integrating TIA (RGC-CI-TIA) has been presented. Use of RGC-CI-TIA over conventional common-gate (CG) CI-TIA eliminates the need of additional passive termination improving the current efficiency and also results in substantial power reduction of the Rx. The Rx also deploys a speculative 1-tap current-integrating decision-feedback equalizer (DFE) which along with a 2-tap Tx feed-forward equalizer (Tx-FFE) compensate 18 dB of loss at 2.5 GHz of a 41" FR4 PCB trace. The proposed Rx achieves a channel signal-swing of 20 mVppd and input sensitivity of 1.2 mVppd by means of a significant voltage gain of 15 offered by the RGC-CI-TIA. The Rx has been designed in 180 nm CMOS technology and consumes 5.25 mW from a 1.8 V supply for a data rate of 5 Gb/s resulting in an energy efficiency of 1.05 pJ/bit.