{"title":"A design of CMOS broadband amplifier with high-Q active inductor","authors":"Jhy-Neng Yang, Y. Cheng, Chen-Yi Lee","doi":"10.1109/IWSOC.2003.1213011","DOIUrl":null,"url":null,"abstract":"A CMOS broadband amplifier with high-Q active inductor using 0.25 /spl mu/m CMOS process is presented. In this broadband amplifier, the compact high-Q active inductor is connected to the common-gate configuration to improve the performance of the high power gain, wide bandwidth, low power consumption and simple matching characteristics. Not using any passive inductor components is to be reduced the area of chip and the complexity. Advance Design System (ADS) simulator has been performed to verify the performance of the designed broadband amplifier. It has been shown that the amplifier has a 20 dB(S21) power gain in -3 dB bandwidth, S11 of -17 dB, S22 of -21 dB and noise figure (NF) of 8 dB under 2.5 V power supply with 18 mW power consumption.","PeriodicalId":259178,"journal":{"name":"The 3rd IEEE International Workshop on System-on-Chip for Real-Time Applications, 2003. Proceedings.","volume":"33 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2003-07-22","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"10","resultStr":null,"platform":"Semanticscholar","paperid":null,"PeriodicalName":"The 3rd IEEE International Workshop on System-on-Chip for Real-Time Applications, 2003. Proceedings.","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/IWSOC.2003.1213011","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
引用次数: 10
Abstract
A CMOS broadband amplifier with high-Q active inductor using 0.25 /spl mu/m CMOS process is presented. In this broadband amplifier, the compact high-Q active inductor is connected to the common-gate configuration to improve the performance of the high power gain, wide bandwidth, low power consumption and simple matching characteristics. Not using any passive inductor components is to be reduced the area of chip and the complexity. Advance Design System (ADS) simulator has been performed to verify the performance of the designed broadband amplifier. It has been shown that the amplifier has a 20 dB(S21) power gain in -3 dB bandwidth, S11 of -17 dB, S22 of -21 dB and noise figure (NF) of 8 dB under 2.5 V power supply with 18 mW power consumption.
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