Challenge of a multiple-valued technology in recent deep-submicron VLSI

Abstract

A logic-in-memory VLSI architecture based on multiple-valued floating-gate MOS pass-transistor logic is proposed to solve a communication bottleneck between modules in the recent deep-submicron VLSI. Moreover, a multiple-valued current-mode circuit based on dual-rail differential logic is also proposed as a candidate suitable for self-checking and asynchronous VLSI systems. Finally, the advantage of the above multiple-valued circuit technologies is shown by using design examples.