LC Tank Differential Inductor-Coupled Dual-Core 60 GHz Push-Push VCO in 45 nm RF-SOI CMOS Technology

J. Rimmelspacher, R. Weigel, A. Hagelauer, V. Issakov
{"title":"LC Tank Differential Inductor-Coupled Dual-Core 60 GHz Push-Push VCO in 45 nm RF-SOI CMOS Technology","authors":"J. Rimmelspacher, R. Weigel, A. Hagelauer, V. Issakov","doi":"10.1109/SIRF.2019.8709120","DOIUrl":null,"url":null,"abstract":"This paper presents a 60 GHz dual-core push-push VCO in a 45 nm partially depleted (PD) RF Silicon-on-Insulator (SOI) CMOS technology. The cores are coupled inductively via differential inductors. The best measured phase noise at 1 MHz offset from a 63 GHz carrier is -$94.4 dBc/Hz. The wideband continuous frequency-tuning-range (FTR) is 16 %. The DC power dissipation is 76 mW including fundamental 30 GHz and second harmonic (H2) 60 GHz output buffers at 1 V power supply voltage. The measurement results of a reference single-core VCO design proves the relative phase noise improvement of the implemented core-coupling technique. The chip area excluding pads is 0.09 mm2.","PeriodicalId":356507,"journal":{"name":"2019 IEEE 19th Topical Meeting on Silicon Monolithic Integrated Circuits in RF Systems (SiRF)","volume":"412 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2019-01-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"3","resultStr":null,"platform":"Semanticscholar","paperid":null,"PeriodicalName":"2019 IEEE 19th Topical Meeting on Silicon Monolithic Integrated Circuits in RF Systems (SiRF)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/SIRF.2019.8709120","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
引用次数: 3

Abstract

This paper presents a 60 GHz dual-core push-push VCO in a 45 nm partially depleted (PD) RF Silicon-on-Insulator (SOI) CMOS technology. The cores are coupled inductively via differential inductors. The best measured phase noise at 1 MHz offset from a 63 GHz carrier is -$94.4 dBc/Hz. The wideband continuous frequency-tuning-range (FTR) is 16 %. The DC power dissipation is 76 mW including fundamental 30 GHz and second harmonic (H2) 60 GHz output buffers at 1 V power supply voltage. The measurement results of a reference single-core VCO design proves the relative phase noise improvement of the implemented core-coupling technique. The chip area excluding pads is 0.09 mm2.
查看原文
分享 分享
微信好友 朋友圈 QQ好友 复制链接
本刊更多论文
45纳米RF-SOI CMOS技术的LC槽差分电感耦合双核60 GHz推推式压控振荡器
本文提出了一种采用45纳米部分耗尽(PD)射频绝缘体上硅(SOI) CMOS技术的60 GHz双核推推式压控振荡器。磁芯通过差动电感电感耦合。在63 GHz载波的1 MHz偏移时,测量到的最佳相位噪声为-$94.4 dBc/Hz。宽带连续调频范围(FTR)为16%。直流功耗为76 mW,其中基频30ghz和次谐波(H2) 60ghz输出缓冲器在1v电源电压下。参考单芯压控振荡器设计的测量结果证明了所实现的芯耦合技术对相对相位噪声的改善。不包括焊盘的芯片面积为0.09 mm2。
本文章由计算机程序翻译,如有差异,请以英文原文为准。
求助全文
约1分钟内获得全文 去求助
来源期刊
自引率
0.00%
发文量
0
期刊最新文献
A W-Band SiGe Transceiver with Built-in Self-Test A 28 GHz Static CML Frequency Divider with Back-Gate Tuning on 22-nm CMOS FD-SOI Technology [Copyright notice] RF-MEMS Based V-Band Impedance Tuner Driven by Integrated High-Voltage LDMOS Switch Matrix and Charge Pump Compact Modeling of Series Stacked Tapered Spiral Inductors
×
引用
GB/T 7714-2015
复制
MLA
复制
APA
复制
导出至
BibTeX EndNote RefMan NoteFirst NoteExpress
×
×
提示
您的信息不完整,为了账户安全,请先补充。
现在去补充
×
提示
您因"违规操作"
具体请查看互助需知
我知道了
×
提示
现在去查看 取消
×
提示
确定
0
微信
客服QQ
Book学术公众号 扫码关注我们
反馈
×
意见反馈
请填写您的意见或建议
请填写您的手机或邮箱
已复制链接
已复制链接
快去分享给好友吧!
我知道了
×
扫码分享
扫码分享
Book学术官方微信
Book学术文献互助
Book学术文献互助群
群 号:481959085
Book学术
文献互助 智能选刊 最新文献 互助须知 联系我们:info@booksci.cn
Book学术提供免费学术资源搜索服务,方便国内外学者检索中英文文献。致力于提供最便捷和优质的服务体验。
Copyright © 2023 Book学术 All rights reserved.
ghs 京公网安备 11010802042870号 京ICP备2023020795号-1