Matthias Müller, A. Braun, J. Gerlach, W. Rosenstiel, Dennis Nienhüser, Johann Marius Zöllner, O. Bringmann
{"title":"Design of an automotive traffic sign recognition system targeting a multi-core SoC implementation","authors":"Matthias Müller, A. Braun, J. Gerlach, W. Rosenstiel, Dennis Nienhüser, Johann Marius Zöllner, O. Bringmann","doi":"10.1109/DATE.2010.5457147","DOIUrl":null,"url":null,"abstract":"This paper describes the design of an automotive traffic sign recognition application. All stages of the design process, starting on system-level with an abstract, pure functional model down to final hardware/software implementations on an FPGA, are shown. The proposed design flow tackles existing bottlenecks of today's system-level design processes, following an early model-based performance evaluation and analysis strategy, which takes into account hardware, software and real-time operating system aspects. The experiments with the traffic sign recognition application show, that the developed mechanisms are able to identify appropriate system configurations and to provide a seamless link into the underlying implementation flows.","PeriodicalId":432902,"journal":{"name":"2010 Design, Automation & Test in Europe Conference & Exhibition (DATE 2010)","volume":"521 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2010-03-08","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"32","resultStr":null,"platform":"Semanticscholar","paperid":null,"PeriodicalName":"2010 Design, Automation & Test in Europe Conference & Exhibition (DATE 2010)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/DATE.2010.5457147","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
引用次数: 32
Abstract
This paper describes the design of an automotive traffic sign recognition application. All stages of the design process, starting on system-level with an abstract, pure functional model down to final hardware/software implementations on an FPGA, are shown. The proposed design flow tackles existing bottlenecks of today's system-level design processes, following an early model-based performance evaluation and analysis strategy, which takes into account hardware, software and real-time operating system aspects. The experiments with the traffic sign recognition application show, that the developed mechanisms are able to identify appropriate system configurations and to provide a seamless link into the underlying implementation flows.