{"title":"In-channel Flow Control Scheme for Network-on-Chip","authors":"Vrishali Vijay Nimbalkar, Kuruvilla Varghese","doi":"10.1109/DSD.2010.73","DOIUrl":null,"url":null,"abstract":"Present day System-on-Chip utilizes Network-on-Chip for communication between the cores, which require proper flow control schemes for efficient utilization of network resources. We propose a flow control scheme that combines piggybacking and credit flit transmission with in-channel signaling to provide, router's input port's free buffer count information to the neighboring routers. Alternating bit protocol is used for transmitting and receiving data and credit flits. Our scheme does not use additional flit cycles or extra signaling lines overhead for credit flit transmission. We have used Noxim, a SystemC based simulator to evaluate the performance of our scheme. Compared to dedicated signaling flow control, in the proposed scheme, throughput remains the same, whereas, there is an increase in average delay by maximum of five flit cycles (13 percent) for transpose traffic and minimum of one flit cycle (0.3 percent) for hotspot traffic. Also, a router designed to implement our scheme requires 12.69 percent less signaling lines.","PeriodicalId":356885,"journal":{"name":"2010 13th Euromicro Conference on Digital System Design: Architectures, Methods and Tools","volume":"66 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2010-09-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"2","resultStr":null,"platform":"Semanticscholar","paperid":null,"PeriodicalName":"2010 13th Euromicro Conference on Digital System Design: Architectures, Methods and Tools","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/DSD.2010.73","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
引用次数: 2
Abstract
Present day System-on-Chip utilizes Network-on-Chip for communication between the cores, which require proper flow control schemes for efficient utilization of network resources. We propose a flow control scheme that combines piggybacking and credit flit transmission with in-channel signaling to provide, router's input port's free buffer count information to the neighboring routers. Alternating bit protocol is used for transmitting and receiving data and credit flits. Our scheme does not use additional flit cycles or extra signaling lines overhead for credit flit transmission. We have used Noxim, a SystemC based simulator to evaluate the performance of our scheme. Compared to dedicated signaling flow control, in the proposed scheme, throughput remains the same, whereas, there is an increase in average delay by maximum of five flit cycles (13 percent) for transpose traffic and minimum of one flit cycle (0.3 percent) for hotspot traffic. Also, a router designed to implement our scheme requires 12.69 percent less signaling lines.