GHz Serial Passive Clock Distribution in VLSI Using Bidirectional Signaling

V. Prodanov, M. Banu
{"title":"GHz Serial Passive Clock Distribution in VLSI Using Bidirectional Signaling","authors":"V. Prodanov, M. Banu","doi":"10.1109/CICC.2006.320872","DOIUrl":null,"url":null,"abstract":"Thr authors introduce a serial passive clock distribution technique allowing efficient and accurate skew removal at any arbitrary clock drop point. The passive transmission medium may be on-chip electrical transmission lines built in current IC technology or possible optical waveguides in future developments. The proposed technique is naturally insensitive to practical loses and other non ideal effects and has the capability of covering large chip areas","PeriodicalId":269854,"journal":{"name":"IEEE Custom Integrated Circuits Conference 2006","volume":"43 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2006-09-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"6","resultStr":null,"platform":"Semanticscholar","paperid":null,"PeriodicalName":"IEEE Custom Integrated Circuits Conference 2006","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/CICC.2006.320872","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
引用次数: 6

Abstract

Thr authors introduce a serial passive clock distribution technique allowing efficient and accurate skew removal at any arbitrary clock drop point. The passive transmission medium may be on-chip electrical transmission lines built in current IC technology or possible optical waveguides in future developments. The proposed technique is naturally insensitive to practical loses and other non ideal effects and has the capability of covering large chip areas
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VLSI中使用双向信令的GHz串行无源时钟分配
作者介绍了一种串行无源时钟分配技术,可以在任意时钟落点高效准确地去除偏态。无源传输介质可以是当前集成电路技术中内置的片上电子传输线,也可以是未来发展中可能的光波导。所提出的技术对实际损失和其他非理想影响自然不敏感,并且具有覆盖大芯片面积的能力
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