Micromachined branch line coupler in CMOS technology

Abstract

An internally ground-equalized coplanar branch line coupler (BLC) is fabricated by post-processing 2poly/2metal analog CMOS chips. First level metallization is used to equalize the ground planes, hence to suppress the unwanted coupled-slot-line mode propagation. This addition necessitates additional compensation of signal lines to improve the return losses. Fabricated CMOS chips are post-processed with a two-step procedure. First, a thick polyimide film is screen-printed on the devices as a stress-compensation. Then, the silicon substrate is selectively removed underneath the devices. The measured responses show very good agreement with simulations. Fabricated devises exhibit return losses less than 10 dB and maximum of 1 dB amplitude difference in the frequency range of 25-30 GHz.