{"title":"MIMO RFIC Transceiver Designs for WLAN Applications","authors":"F. Dai, Yin Shi, Jun Yan, Xueqing Hu","doi":"10.1109/ICASIC.2007.4415638","DOIUrl":null,"url":null,"abstract":"This paper presents a low-power single chip WLAN 802.11a transceiver RFIC for personal communication terminal applications. The 5.2 GHz transceiver RFIC is implemented in a 0.5 mum SiGe technology with 16 mm2 die size. It consumes 110/130 mA in receive/transmit mode under a 3.3V supply. The receiver path shows a 6.4 dB noise figure and a -20 dBm IIP3 under a maximal 67 dB gain. The transmitter path OIP3 is measured as 29.7 dBm. The LC-tuned VCO has a tuning range from 4.08 GHz to 4.7 GHz and the measured phase noise is -112 dBc/Hz @ 1 MHz offset. Also discussed are design considerations for multiple-input-multiple-output (MIMO) transceiver RFIC implementations.","PeriodicalId":120984,"journal":{"name":"2007 7th International Conference on ASIC","volume":"54 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2007-10-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"10","resultStr":null,"platform":"Semanticscholar","paperid":null,"PeriodicalName":"2007 7th International Conference on ASIC","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/ICASIC.2007.4415638","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
引用次数: 10
Abstract
This paper presents a low-power single chip WLAN 802.11a transceiver RFIC for personal communication terminal applications. The 5.2 GHz transceiver RFIC is implemented in a 0.5 mum SiGe technology with 16 mm2 die size. It consumes 110/130 mA in receive/transmit mode under a 3.3V supply. The receiver path shows a 6.4 dB noise figure and a -20 dBm IIP3 under a maximal 67 dB gain. The transmitter path OIP3 is measured as 29.7 dBm. The LC-tuned VCO has a tuning range from 4.08 GHz to 4.7 GHz and the measured phase noise is -112 dBc/Hz @ 1 MHz offset. Also discussed are design considerations for multiple-input-multiple-output (MIMO) transceiver RFIC implementations.
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