{"title":"A DC-7 GHz Small-Area Distributed Amplifier Using 5-port Inductors in a 180nm Si CMOS Technology","authors":"T. Ito, D. Kawazoe, K. Okada, K. Masu","doi":"10.1109/ASSCC.2006.357926","DOIUrl":null,"url":null,"abstract":"This paper proposes a novel small-area distributed amplifler (DA), which utilizes two 5-port inductors to replace eight inductors. The DA is fabricated using a standard 180 nm CMOS process with 6 metal layers. The layout area of DA is 0.33 mm2. It is about 50 % as large as conventional DAs, and it has power gain of 6.3 dB and noise figure of 6 dB at DC-7 GHz.","PeriodicalId":142478,"journal":{"name":"2006 IEEE Asian Solid-State Circuits Conference","volume":"110 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2006-11-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"8","resultStr":null,"platform":"Semanticscholar","paperid":null,"PeriodicalName":"2006 IEEE Asian Solid-State Circuits Conference","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/ASSCC.2006.357926","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
引用次数: 8
Abstract
This paper proposes a novel small-area distributed amplifler (DA), which utilizes two 5-port inductors to replace eight inductors. The DA is fabricated using a standard 180 nm CMOS process with 6 metal layers. The layout area of DA is 0.33 mm2. It is about 50 % as large as conventional DAs, and it has power gain of 6.3 dB and noise figure of 6 dB at DC-7 GHz.
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