The Effects of Steep Voltage Slopes on Insulation Systems of Coil Windings caused by Next Generation Power Semiconductor Devices

V. Grau, R. D. De Doncker
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引用次数: 14

Abstract

Next generation silicon carbide (SiC) and gallium nitride (GaN) semiconductors offer much faster switching characteristics in power electronic devices. The faster switching speed allows higher switching frequencies in combination with lower losses, which leads to smaller components and thus, a higher power density. However, the high voltage slopes associated with fast switching cause exceeding stress on the insulation systems, especially of coil windings. This increased stress results in accelerated aging and thus, premature failure of the insulation system. This paper focuses on the design and execution of experiments to quantify the detrimental effects of fast switching on the insulation system of coil windings. To investigate these effects, a dv/dt- generator is developed to excite various specimens with steep voltage slopes. Commercial products are not suitable for this purpose as they are either not available on the market or do not fully exploit the potential of the next generation semiconductors. A SiC-based inverter with an H-bridge topology is selected. The dielectric strength of twisted pair enameled wires are tested using a standardized insulation tester and the proposed dv/dt-generator. While the specimen withstands the standardized insulation test, partial discharges occur during excitation with high dv/dt, which leads to a premature breakdown after short time, even though the dv/dt test voltage is less than a sixth of the standardized test. It is experimentally observed that the steepness of the voltage slope has a major impact on the insulation system.
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陡坡电压对新一代功率半导体器件线圈绕组绝缘系统的影响
下一代碳化硅(SiC)和氮化镓(GaN)半导体在电力电子器件中提供了更快的开关特性。更快的开关速度允许更高的开关频率与更低的损耗相结合,从而导致更小的组件,从而更高的功率密度。然而,与快速开关相关的高电压斜率会对绝缘系统,特别是线圈绕组造成过大的应力。这种增加的应力导致加速老化,从而导致绝缘系统过早失效。本文着重于实验的设计和执行,以量化快速开关对线圈绕组绝缘系统的有害影响。为了研究这些影响,开发了一个dv/dt发生器来激励具有陡峭电压斜率的各种试样。商业产品不适合这一目的,因为它们要么在市场上买不到,要么没有充分利用下一代半导体的潜力。选择了一种基于硅基的h桥拓扑逆变器。采用标准化绝缘测试仪和所设计的dv/dt发生器对双绞线漆包线的介电强度进行了测试。虽然试样经受了标准化绝缘试验,但在高dv/dt激励时,即使dv/dt试验电压小于标准化试验电压的六分之一,也会发生局部放电,导致试样在短时间内过早击穿。实验观察到,电压斜率的陡度对绝缘系统有很大的影响。
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