Evaluation of EMVA Using the Instruction-Level Parallelism on Tegra X1

H. Tominaga, Asuka Nakamura, Y. Maekawa
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Abstract

Generally, solving random-sparse equations requires a direct method such as the LU decomposition. This paper proposes a speed-up method based on the extended vectorized LU factorization (EMVA) method for solving random-sparse equations using the instruction-level parallelism of the CUDA GPU. It is known that EMVA on CUDA achieves high execution efficiency [1]. However, the overhead of calling the kernel of EMVA is not small because the EMVA method needs to call a new kernel each time the instruction level increases. This overhead becomes smaller when using an architecture that can switch smoothly between the CPU and GPU kernels, such as the Tegra X1 architectures. Therefore, the proposed method selects the execution architecture of each instruction level from CPU to GPU on the basis of the parallelism of its instruction level. Our evaluation result demonstrate that the proposed method achieves about x26.5 speedup compared to the existing EMVA method.
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在Tegra X1上使用指令级并行性评估EMVA
一般来说,求解随机稀疏方程需要一种直接的方法,如LU分解。本文利用CUDA GPU的指令级并行性,提出了一种基于扩展矢量化LU分解(EMVA)方法求解随机稀疏方程的加速方法。众所周知,EMVA在CUDA上的执行效率很高[1]。然而,调用EMVA内核的开销并不小,因为每次指令级别增加时,EMVA方法都需要调用一个新的内核。当使用可以在CPU和GPU内核之间平滑切换的体系结构(例如Tegra X1体系结构)时,这种开销会变得更小。因此,该方法根据各指令层的并行性,从CPU到GPU选择各指令层的执行架构。我们的评估结果表明,与现有的EMVA方法相比,该方法的加速速度提高了约x26.5。
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