{"title":"Search-Space Optimizations for High-Level ATPG","authors":"J. Campos, H. Al-Asaad","doi":"10.1109/MTV.2005.23","DOIUrl":null,"url":null,"abstract":"The mutation based validation paradigm (MVP) is a validation environment for high-level microprocessor implementations. To be able to efficiently identify and analyze the architectural states (prospect states) that can possibly satisfy a set of constraints during MVP's test generation, the authors need to reduce the search space in the analysis process as early as possible. In this paper, the authors present some optimizations in the search space that speed up the overall test generation process","PeriodicalId":179953,"journal":{"name":"2005 Sixth International Workshop on Microprocessor Test and Verification","volume":null,"pages":null},"PeriodicalIF":0.0000,"publicationDate":"2005-11-03","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"4","resultStr":null,"platform":"Semanticscholar","paperid":null,"PeriodicalName":"2005 Sixth International Workshop on Microprocessor Test and Verification","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/MTV.2005.23","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
引用次数: 4
Abstract
The mutation based validation paradigm (MVP) is a validation environment for high-level microprocessor implementations. To be able to efficiently identify and analyze the architectural states (prospect states) that can possibly satisfy a set of constraints during MVP's test generation, the authors need to reduce the search space in the analysis process as early as possible. In this paper, the authors present some optimizations in the search space that speed up the overall test generation process