A unified hardware/software co-synthesis solution for signal processing systems

E. Bezati, H. Yviquel, M. Raulet, M. Mattavelli
{"title":"A unified hardware/software co-synthesis solution for signal processing systems","authors":"E. Bezati, H. Yviquel, M. Raulet, M. Mattavelli","doi":"10.1109/DASIP.2011.6136877","DOIUrl":null,"url":null,"abstract":"This paper presents a methodology to specify from a high-level data-flow description an application for both hardware and software synthesis. Firstly, an introduction to RVC-Cal data-flow programming and Orcc framework is presented. Furthermore, an analysis of a close to gate intermediate representation (XLIM) is bestowed. As a proof of concept a JPEG codec was written purely in RVC-Cal to test the co-synthesis tools and then an analysis of the generated hardware and software results are given. Our experience shows that using RVC-Cal can unify the process of creating the same application for software and hardware without modifying a single source code for each solution.","PeriodicalId":199500,"journal":{"name":"Proceedings of the 2011 Conference on Design & Architectures for Signal & Image Processing (DASIP)","volume":"12 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2011-11-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"23","resultStr":null,"platform":"Semanticscholar","paperid":null,"PeriodicalName":"Proceedings of the 2011 Conference on Design & Architectures for Signal & Image Processing (DASIP)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/DASIP.2011.6136877","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
引用次数: 23

Abstract

This paper presents a methodology to specify from a high-level data-flow description an application for both hardware and software synthesis. Firstly, an introduction to RVC-Cal data-flow programming and Orcc framework is presented. Furthermore, an analysis of a close to gate intermediate representation (XLIM) is bestowed. As a proof of concept a JPEG codec was written purely in RVC-Cal to test the co-synthesis tools and then an analysis of the generated hardware and software results are given. Our experience shows that using RVC-Cal can unify the process of creating the same application for software and hardware without modifying a single source code for each solution.
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用于信号处理系统的统一硬件/软件协同合成解决方案
本文提出了一种从高级数据流描述中指定硬件和软件综合应用程序的方法。首先介绍了RVC-Cal数据流编程和Orcc框架。在此基础上,对近门中间表示(XLIM)进行了分析。作为概念验证,我们在RVC-Cal中编写了一个JPEG编解码器来测试协同合成工具,然后对生成的硬件和软件结果进行了分析。我们的经验表明,使用RVC-Cal可以统一为软件和硬件创建相同应用程序的过程,而无需为每个解决方案修改单个源代码。
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