A. Kostrov, V. Stempitsky, A. Borovik, V. Tchekhovsky
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引用次数: 1
Abstract
8-channel mixed-signal application specific test IC was implemented in a TSMC 0.18 µm CMOS MS/RF 1.8/3.3 V process. A single IC channel is comprised of a chargesensitive preamplifier/shaper with a semi-Gaussian response, shaping amplifier with ion tail cancellation circuitry, differential output baseline restorer, a 10bit 10MSPS ADC. The structural scheme and specification of the IC are presented, the algorithm and features of chip functioning are described. The results of IC test channel simulation in the Cadence software package are presented.
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