FPGA Based Hardware Accelerator for Sorting Data

Abstract

Sorting data is one of the most important processes in data processing. Fast processing is urgently needed for real time data access. Therefore, hardware accelerator is used to fasten the data processing. In this paper, we present FPGA based hardware accelerators for data sorting using bubble, selection, insertion and merge sorting algorithms. Further, we provide a fair comparison between them in terms of execution time, and area. Our implementations result in that for small data set, merge sort is the best sorting algorithm in terms of execution time. Therefore, it can be used as a parallel cooperative system with CPU for high speed data processing.