A. Herkersdorf, P. Buchmann, R. Clauberg, W. Lemppenau, H. Schindler, D. Webb
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引用次数: 2
Abstract
This paper presents the architectural concepts behind a versatile VLSI device that maps ATM, IP, and/or traditional T1/T3 traffic streams into SONET/SDH transport signals ranging from OC-1 to OC-48/STM-16. Additional key features for effective system integration are on-chip support for add-drop multiplexing, digital cross-connect, and automatic protection switching functions. A roadmap discussing the applicability of the developed concepts for next-generation framers up to OC-192/STM-64 is also presented.
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