A low power, low latency tunable Quasi-resonant interconnect using active inductor

M. Bhaskar, D. Sridevi, B. Venkataramani
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Abstract

In literature, to obtain low power, low latency and high performance interconnects, Quasi-resonance concept is implemented with a series spiral inductor. In this paper Quasi-resonant serial interconnect link with a tunable active inductor is proposed to obtain low power, low latency and low area. The proposed scheme is implemented in a UMC 0.18-µm CMOS technology and the post layout simulations are carried out. The performance evaluation is done for 5mm interconnect with a serial data rate of 5Gbps. From simulations, the insertion point and the value of inductor for the minimum power-delay product is obtained. The observed delay and power of the serial link is 290 psec and 13.52 mW, which is less by a factor of 1.27 and 1.87 than the conventional repeater insertion respectively. The area of the active inductor is 1904µm2, which is less by a factor of 3.53 compared to spiral inductor scheme. The proposed scheme has the advantage to tune the interconnect, for data rates from 1Gbps to 5Gpbs by varying the bias voltages of the tunable active inductor.
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采用有源电感的低功耗、低延迟可调谐准谐振互连
在文献中,为了获得低功耗、低延迟和高性能的互连,准共振概念是通过串联螺旋电感实现的。本文提出了一种带有可调谐有源电感的准谐振串行互连链路,以获得低功耗、低时延和低面积。该方案在UMC 0.18µm CMOS技术上实现,并进行了后期布局仿真。在5Gbps串行数据速率下,对5mm互连进行了性能评估。通过仿真得到了最小功率延迟积的插入点和电感值。观测到串行链路的延迟和功率分别为290 psec和13.52 mW,分别比传统中继器插入低1.27和1.87倍。有源电感面积为1904µm2,与螺旋电感方案相比减小了3.53倍。该方案的优点是通过改变可调谐有源电感的偏置电压来调整互连,数据速率从1Gbps到5gbbs。
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