{"title":"Per-Pixel Floating-Point ADCs with Electronic Shutters for a High Dynamic Range, High Frame Rate Infrared Focal Plane Array","authors":"Sang-Min Lee, Hyunsik Park, B. Wooley","doi":"10.1109/CICC.2006.320864","DOIUrl":null,"url":null,"abstract":"A per-pixel floating-point, dual-slope A/D converter (ADC) array for a 16 times 16 long wavelength infrared detector array has been integrated in a 0.18-mum CMOS technology. To achieve a high dynamic range and high frame rate simultaneously, an electronic shutter is combined with an ADC for each pixel. A unique method of comparator offset cancellation, employing an integration capacitor with digital calibration, improves the uniformity of the array. The experimental prototype achieves a 19-bit dynamic range and 8-bit resolution at 3 kfps, with a power consumption of only 7 muW/pixel. Each per-pixel ADC occupies 4000 mum2 and is well-suited to 3-dimensional integration","PeriodicalId":269854,"journal":{"name":"IEEE Custom Integrated Circuits Conference 2006","volume":"25 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2006-09-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"8","resultStr":null,"platform":"Semanticscholar","paperid":null,"PeriodicalName":"IEEE Custom Integrated Circuits Conference 2006","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/CICC.2006.320864","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
引用次数: 8
Abstract
A per-pixel floating-point, dual-slope A/D converter (ADC) array for a 16 times 16 long wavelength infrared detector array has been integrated in a 0.18-mum CMOS technology. To achieve a high dynamic range and high frame rate simultaneously, an electronic shutter is combined with an ADC for each pixel. A unique method of comparator offset cancellation, employing an integration capacitor with digital calibration, improves the uniformity of the array. The experimental prototype achieves a 19-bit dynamic range and 8-bit resolution at 3 kfps, with a power consumption of only 7 muW/pixel. Each per-pixel ADC occupies 4000 mum2 and is well-suited to 3-dimensional integration
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