DECOMPOSER: a synthesizer for systolic systems

Pao-Po Hou, R. Owens, M. J. Irwin
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引用次数: 7

Abstract

A tool for synthesizing systolic systems is introduced. Given a hierarchical specification of the computations to be performed and hints as to how, this tool generates an analysis of the hardware required to the computations. The computations are specified as directed acyclic graphs, and the hints provide the temporal and topological relationships of each computation. The systolic system is synthesized by traversing the graph and marking each computation with a processor name and a time stamp. Its output can subsequently be fed to the remaining tools in the tool set to generate a VLSI fabrication description of the systolic system.<>
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分解者:收缩系统的合成器
介绍了一种合成收缩系统的工具。给定要执行的计算的分层规范和如何执行的提示,该工具生成计算所需硬件的分析。计算被指定为有向无环图,并且提示提供了每个计算的时间和拓扑关系。收缩系统是通过遍历图并用处理器名称和时间戳标记每个计算来合成的。其输出随后可馈送到工具集中的其余工具,以生成收缩系统的VLSI制造描述。
本文章由计算机程序翻译,如有差异,请以英文原文为准。
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