Latest developments in bumping technologies for flip chip and WLCSP packaging

D. Manessis, R. Aschenbrenner, A. Ostmann, H. Reichl
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引用次数: 1

Abstract

Stencil printing of solder paste remains the technology route of choice for flip chip bumping because of its economical advantages over traditionally costly evaporation and electroplating processes. Fraunhofer IZM printing group has developed stencil printing processes to meet the current trends in wafer bumping roadmaps with continuous increase of I/O's and reduced bumping pitch. Mainstream wafer bumping has been performed by using innovative Type 5 (15-25μm) and Type 6 (5-15μm) pastes with both Sn-Pb and Pb-free compositions from 300 μm up to 100 μm pitches for peripheral pad configurations and up to 120 μm for area array configurations. At R&D level, IZM has advanced stencil printing very close to its technological limits at pitches even down to 50 μm. Innovative electroformed and laser-cut with nano-treatment stencils have been manufactured with an extreme thinness of 20 μm for bumping wafers at Ultra fine pitches (UFP) of 100 μm, 80 μm and 60 μm. Specifically, for 100 μm pitch bumping, both type 7 (2-11μm) and type 6 (5-15μm) pastes of eutectic composition Sn63/Pb37 have been successfully employed. Bumping using 25 μm electroformed stencil thickness has yielded bump heights of 42.3±3.8μm and 43.6±3.5μm for type 7 and type 6 pastes, respectively. A newly prototype developed type 8 paste (2-8μm) has been used for the first time to bump chips with peripheral contacts at 80 μm and 60 μm pitch. Bumping at 80 μm pitch with nano-treated laser-cut stencil has yielded bumps of 28 μm in height. For bumping at 60 μm pitch, a 20 μm thick electroformed stencil was used with 35 μmx80 μm oblong apertures. Printing at 60 μm pitch has yielded very promising results and has proved the capability of electroformed technology to manufacture accurate and robust thin stencils. The bump height at 60 μm pitch was measured to be 28 ±3 μm. Paste-in-Resist technology lias been developed as an alternative to stencils in order to overcome the manufacturing difficulties of making extremely small apertures. Paste is printed in resist apertures which have been opened by photolithographic processes. In this way, bumping has been demonstrated up to 50 μm pitches. Complimentary to stencil printing processes, IZM has developed balling technologies up to 400 μm pitch up to 8" wafers with a thickness of 150 μm. Solder balling can be achieved either by "perform ball print" using conventional stencil printers with specially designed stencils or by "ball drop" techniques. Balling technologies have demonstrated the application of 300 μm and 250 μm Sn-Pb and Pb-free balls at respective area array pitches of 500 μm and 400 μm, the main I/O pitches for WL-CSP bumping.
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倒装芯片和WLCSP封装的碰撞技术的最新发展
锡膏的模板印刷仍然是倒装芯片冲压的技术路线,因为它比传统的昂贵的蒸发和电镀工艺具有经济优势。Fraunhofer IZM印刷集团开发了模板印刷工艺,以满足晶圆碰撞路线图的当前趋势,不断增加I/O和减少碰撞间距。目前,主流的晶圆提升技术是采用创新的Type 5 (15-25μm)和Type 6 (5-15μm)膏体实现的,其Sn-Pb和无pb成分的间距为300 μm至100 μm,用于外围衬垫配置,间距可达120 μm用于区域阵列配置。在研发层面,IZM先进的模板打印技术非常接近其技术极限,甚至可以低至50 μm。创新的电铸和激光切割纳米处理模板的厚度达到20 μm,用于在100 μm, 80 μm和60 μm的超细间距(UFP)上碰撞晶圆。具体来说,对于100 μm间距的碰撞,成功地采用了共晶成分Sn63/Pb37的7型(2-11μm)和6型(5-15μm)浆料。在25 μm电铸模板厚度下,7型和6型膏体的碰撞高度分别为42.3±3.8μm和43.6±3.5μm。首次使用新开发的8型浆料(2 ~ 8μm)原型,对周边触点间距为80 μm和60 μm的芯片进行碰撞。用纳米处理的激光切割模板在80 μm的间距上碰撞产生了28 μm高度的凸起。对于60 μm间距的碰撞,采用20 μm厚的电铸模板,孔径为35 μmx80 μm的长方形。60 μm间距的印刷已经产生了非常有希望的结果,并证明了电铸技术制造精确和坚固的薄模板的能力。在60 μm间距处测得凸起高度为28±3 μm。为了克服制造极小孔径的制造困难,开发了抗蚀胶粘贴技术作为模板的替代品。浆糊是在光刻工艺打开的抗蚀剂孔中印刷的。通过这种方法,可以在50 μm pitch范围内实现碰撞。除了模板印刷工艺,IZM还开发了高达400 μm间距的球化技术,以及厚度为150 μm的8英寸晶圆。焊锡球可以通过“执行球打印”,使用传统的模板打印机与特殊设计的模板或“球滴”技术来实现。采用300 μm和250 μm Sn-Pb球和无pb球,分别在500 μm和400 μm的区域阵列间距(WL-CSP碰撞的主要I/O间距)上应用了球化技术。
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