FPGA based parallel neighborhood search

S. Yu, Y. Lam
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Abstract

An FPGA based generic parallel neighborhood search which exploits parallelism at both search and move levels is proposed. A neighborhood partitioning technique is employed to significantly increase parallelism at move level with minimum hardware resource increment. The proposed approach is applied to a tabu search and evaluated using the quadratic assignment problem. Experimental results show that the proposed technique can enhance the search speed by 13.3 times with a solution quality improvement of 11.9%. Compared with a GPU implementation, this work achieves a speedup of 20.2 times.
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基于FPGA的并行邻域搜索
提出了一种基于FPGA的通用并行邻域搜索方法,该方法利用了搜索和移动两个层次的并行性。采用邻域分区技术,以最小的硬件资源增量显著提高移动级并行度。将该方法应用于禁忌搜索,并使用二次分配问题进行评估。实验结果表明,该方法可将搜索速度提高13.3倍,求解质量提高11.9%。与GPU实现相比,这项工作实现了20.2倍的加速。
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