A numerical analysis of crack growth and morphology evolution in chip-to-packages nano-interconnections

S. Koh, R. Tummala, A. Saxena, P. Selvam
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引用次数: 2

Abstract

The International Technology Roadmap for semiconductors (ITRS) has predicted that by the year 2007, integrated chip (IC) packages will contain feature sizes of 65 nm and an I/O pitch for the die-to-package interconnects approaching 80 mum. These will reduce even further in the next five years. The current approach of using surface mount technology and flip chip are mainly solder based and the lead and lead-free solder interconnects are known to fail mechanically as the pitch is reduced from 200 mum down to lower levels due to the thermal mismatch between the substrate and the chip. Although compliant interconnection could solve some of the mechanical issues, it is done at the expense of the electric performance. The PRC at Georgia Institute of Technology is proposing re-workable copper based nano-interconnections as a new interconnection paradigm as the next step beyond lead-free solders for future low-cost, high performance and high reliability packages. However, very limited data is published about the fatigue life of nano-crystalline materials and specifically those of nano-crystalline copper. It is important to predict crack growth as it can aid the understanding of the useful life of the IC-packages' interconnections. Multiple mechanisms may be responsible for crack initiation, but eventually most dominant fatigue cracks form a surface crack, which often have a semi-elliptical shape. Hence, the fatigue crack growth life predictions in this study are based on the assumption of elliptical and semi-elliptical cracks being initiated in the nano-interconnections. In this study, numerical analysis using the J-integral stress intensity parameter, in conjunction with experimental fatigue crack growth data, has been employed to study semi-elliptical crack growth and morphology evolution in nano-interconnection subject to uniaxial fatigue loading in linear-elastic conditions. The results indicate that a J-integral finite element analysis, using the loading portion of the fatigue cycle, in conjunction with known rates of fatigue crack growth can approximate surface crack morphology evolution. This study also predicts that the long crack growth is a relatively small portion of the total fatigue life of the material for the experimental LCF conditions. Hence, initiation of the cracks in the interconnection is the main criterion used to predict its fatigue life.
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芯片-封装纳米互连中裂纹扩展和形貌演化的数值分析
国际半导体技术路线图(ITRS)预测,到2007年,集成芯片(IC)封装的特征尺寸将达到65纳米,用于芯片到封装互连的I/O间距将接近80微米。在未来五年内,这一数字将进一步减少。目前使用表面贴装技术和倒装芯片的方法主要是基于焊料的,并且由于基板和芯片之间的热不匹配,当间距从200 μ m降低到更低的水平时,已知铅和无铅焊料互连在机械上失败。尽管兼容互连可以解决一些机械问题,但它是以牺牲电气性能为代价的。乔治亚理工学院的PRC正在提出可重新工作的铜基纳米互连,作为一种新的互连范例,作为未来低成本,高性能和高可靠性封装的下一步无铅焊料。然而,关于纳米晶材料,特别是纳米晶铜的疲劳寿命的数据非常有限。预测裂纹扩展是很重要的,因为它可以帮助理解ic封装互连的使用寿命。裂纹萌生可能有多种机制,但最终大多数主要疲劳裂纹形成表面裂纹,通常具有半椭圆形状。因此,本研究的疲劳裂纹扩展寿命预测是基于在纳米连接点中产生椭圆和半椭圆裂纹的假设。本研究采用j积分应力强度参数,结合实验疲劳裂纹扩展数据,对线弹性条件下单轴疲劳载荷作用下纳米互连材料的半椭圆裂纹扩展和形态演化进行了数值分析。结果表明,结合已知的疲劳裂纹扩展速率,利用疲劳循环加载部分的j积分有限元分析可以近似地描述表面裂纹的形态演变。该研究还预测,在实验LCF条件下,长裂纹扩展在材料总疲劳寿命中所占的比例相对较小。因此,连接中裂纹的萌生是预测其疲劳寿命的主要依据。
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