Cost-competitive RF wafer test methodology for high volume production of complex RF ICs

Abstract

The need for radio frequency (RF) test at the wafer level in high-volume production has increased in response to the growing demand for delivering complex "good known dies" (KGD). To keep pace with the market, innovative test solutions need to be developed to meet tighter electrical specifications while maximizing yields and profit margins. This paper presents a versatile test platform built upon low- cost, custom circuitry combined with high performance membrane probes to achieve the lowest test cost per die. In a case study for testing global positioning system (GPS) RF integrated circuit (IC) the proposed methodology implements a quad-site solution to demonstrate superior test time and accuracy compared to traditional approaches.