Design of Hybrid CMOS Non-Volatile SRAM Cells in 130nm RRAM Technology

Hussein Bazzi, A. Harb, H. Aziza, M. Moreau
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引用次数: 7

Abstract

Static Random-Access Memories (SRAMs) are very common in today’s chips industry thanks to their speed and power consumption but they are classified as volatile memory. Non-Volatile SRAMs (NVSRAMs) combine SRAM features with non-volatility. This combination has the advantage to retain data after power off or in the case of power failure, enabling energy-efficient and reliable systems under frequent power-off conditions. This paper presents a detailed overview on Resistive RAM-based NVSRAM structures, with deep looking on the ability to store and restore data. After reviewing the designs, a comparison in terms of speed, power consumption and design complexity is presented for 2 NVSRAM memory cells (6T2R and a 10T1R) implemented in a 130-nm high voltage CMOS technology from STMicroelectronics.
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基于130nm RRAM技术的混合CMOS非易失性SRAM单元设计
由于其速度和功耗,静态随机存取存储器(sram)在当今的芯片行业中非常常见,但它们被归类为易失性存储器。nvsram (Non-Volatile SRAM)是SRAM和非易失性的结合。这种组合的优点是在断电或断电的情况下保留数据,在频繁断电的情况下实现节能和可靠的系统。本文详细介绍了基于电阻式ram的NVSRAM结构,并深入研究了存储和恢复数据的能力。在回顾了设计之后,本文比较了采用意法半导体(STMicroelectronics) 130纳米高压CMOS技术实现的2个NVSRAM存储单元(6T2R和10T1R)在速度、功耗和设计复杂性方面的差异。
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