{"title":"Design of Hybrid CMOS Non-Volatile SRAM Cells in 130nm RRAM Technology","authors":"Hussein Bazzi, A. Harb, H. Aziza, M. Moreau","doi":"10.1109/ICM.2018.8704119","DOIUrl":null,"url":null,"abstract":"Static Random-Access Memories (SRAMs) are very common in today’s chips industry thanks to their speed and power consumption but they are classified as volatile memory. Non-Volatile SRAMs (NVSRAMs) combine SRAM features with non-volatility. This combination has the advantage to retain data after power off or in the case of power failure, enabling energy-efficient and reliable systems under frequent power-off conditions. This paper presents a detailed overview on Resistive RAM-based NVSRAM structures, with deep looking on the ability to store and restore data. After reviewing the designs, a comparison in terms of speed, power consumption and design complexity is presented for 2 NVSRAM memory cells (6T2R and a 10T1R) implemented in a 130-nm high voltage CMOS technology from STMicroelectronics.","PeriodicalId":305356,"journal":{"name":"2018 30th International Conference on Microelectronics (ICM)","volume":"94 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2018-12-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"7","resultStr":null,"platform":"Semanticscholar","paperid":null,"PeriodicalName":"2018 30th International Conference on Microelectronics (ICM)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/ICM.2018.8704119","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
引用次数: 7
Abstract
Static Random-Access Memories (SRAMs) are very common in today’s chips industry thanks to their speed and power consumption but they are classified as volatile memory. Non-Volatile SRAMs (NVSRAMs) combine SRAM features with non-volatility. This combination has the advantage to retain data after power off or in the case of power failure, enabling energy-efficient and reliable systems under frequent power-off conditions. This paper presents a detailed overview on Resistive RAM-based NVSRAM structures, with deep looking on the ability to store and restore data. After reviewing the designs, a comparison in terms of speed, power consumption and design complexity is presented for 2 NVSRAM memory cells (6T2R and a 10T1R) implemented in a 130-nm high voltage CMOS technology from STMicroelectronics.