A Re-configurable Memristor Array Structure for In-Memory Computing Applications

Abstract

The memristor-based array architecture promises an efficient analog implementation of the multiply-add engine that can have significant impact in signal processing and neural network implementations. The ability to represent a negative conductance value to correspond to a negative matrix element is one of the main challenges associated with analog memristor array implementation. In this paper, a re-configurable general purpose single array architecture is proposed to realize a multiply-add operation that allows both positive and negative conductance values. The architecture utilizes memristor devices with two different characteristics, one for computation and one for storage. The proposed design has been verified using LTSpice circuit simulator. Several cases with different combinations of polarities for the input voltage and conductance values were demonstrated.