{"title":"Examples of image processing to benefit from an asynchronous implementation","authors":"E. Senn, B. Zavidovique","doi":"10.1109/CAMP.2000.875986","DOIUrl":null,"url":null,"abstract":"This paper describes how asynchronous techniques make easier timing in an image processing computer. It outlines an original machine architecture, and explains why it is asynchronous: the router circuit supports the asynchronism by itself. Its structure and behavior are sketched. Our method for self-timed design, its salient features and contributions to the typical asynchronous circuit design flow are introduced. The VLSI implementation and the cell set design, including full-custom self-timed asynchronous cells, are detailed. Measured circuit's performances are presented, as well as global processing and communication performances for different image processing algorithms. The gain from asynchronism is exhibited.","PeriodicalId":282003,"journal":{"name":"Proceedings Fifth IEEE International Workshop on Computer Architectures for Machine Perception","volume":"1 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2000-09-11","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"0","resultStr":null,"platform":"Semanticscholar","paperid":null,"PeriodicalName":"Proceedings Fifth IEEE International Workshop on Computer Architectures for Machine Perception","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/CAMP.2000.875986","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
引用次数: 0
Abstract
This paper describes how asynchronous techniques make easier timing in an image processing computer. It outlines an original machine architecture, and explains why it is asynchronous: the router circuit supports the asynchronism by itself. Its structure and behavior are sketched. Our method for self-timed design, its salient features and contributions to the typical asynchronous circuit design flow are introduced. The VLSI implementation and the cell set design, including full-custom self-timed asynchronous cells, are detailed. Measured circuit's performances are presented, as well as global processing and communication performances for different image processing algorithms. The gain from asynchronism is exhibited.