Reducing instruction memory energy consumption by using Instruction Buffer and after scheduling analysis

Abstract

Use of Instruction Buffers (also named Repeat Buffers), and caches is common way to avoid memory speed bottleneck in presence of memory hierarchies. Once the instruction resides in a cache or a buffer, repeated execution of the same instruction does not require separate memory access and possible cache miss. Use of the instruction buffers offer also an advantage when low energy consumption is an issue. Reading instruction from the buffer requires order of magnitude less energy then fetch from instruction memory. Keeping memories in the deselect mode and fetching data from the buffer takes roughly half of the power compared to the reading from the memory. In this work, we analyze effects of adding instruction buffer to an existing ASIP architecture. We analyze already generated code of an application, to find the often executed loops, and augment instructions with instruction buffer control information. We show, that for many of embedded applications, storing kernels of execution in the instruction buffer saves between 60 to 87% of instruction memory, even with most trivial loops. This savings can translate to up to 47% reduction of memory energy.