Transpiling Nand2Tetris to VHDL for Teaching Digital Logic

Noah Mogensen, Daniel DeFreez
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Abstract

Nand2Tetris is a popular introduction to digital logic and computer organization that uses a simplified hardware description language (HDL) to program a hardware simulator. The stripped-down HDL allows students to focus on concepts over ceremony, but does not support running designs on real, physical devices such as FPGAs. In contrast, designs written in an industrial-strength language such as VHDL or Verilog can be run on FPGAs, but are burdened with a significant learning curve. WHiDL is a source-to-source compiler that translates Nand2Tetris HDL to VHDL. The conversion to VHDL allows HDL programs to be run on an FPGA while retaining the simplicity of the original HDL.
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将《俄罗斯方块》翻译成VHDL进行数字逻辑教学
Nand2Tetris是一个流行的数字逻辑和计算机组织的介绍,它使用简化的硬件描述语言(HDL)来编程硬件模拟器。简化的HDL允许学生专注于概念而不是仪式,但不支持在真实的物理设备(如fpga)上运行设计。相比之下,用工业强度语言(如VHDL或Verilog)编写的设计可以在fpga上运行,但需要大量的学习曲线。WHiDL是一个源到源编译器,可以将Nand2Tetris HDL转换为VHDL。转换为VHDL允许HDL程序在FPGA上运行,同时保留原始HDL的简单性。
本文章由计算机程序翻译,如有差异,请以英文原文为准。
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