Efficient simulation framework for circuit design with future device technologies [MOS structures]

Abstract

A simulation framework has been developed for fast and accurate calculation of MOS transistor characteristics. It is based on an optimized table model so that it can be run solely using experimental or simulated I-V data, i.e. without any time-consuming determination of model parameters. This model is designed in a very flexible manner, thus it can be used for advanced MOS structures, such as double-gate and FinFET transistors, as well. By this means, it facilitates the integration of a parameterized device technology directly into a conventional design flow to qualify circuits in the design space.