VLSI design of a bus arbitration module for the 68000 series of microprocessors

E. Ososanya, M. McGlone, T. D. Strong
{"title":"VLSI design of a bus arbitration module for the 68000 series of microprocessors","authors":"E. Ososanya, M. McGlone, T. D. Strong","doi":"10.1109/SECON.1994.324344","DOIUrl":null,"url":null,"abstract":"Modern computer systems often are designed around a bus architecture. This, of course eliminates the need for complete point-to-point interconnection of all the devices attached to the bus. The major hurdle to this system is in resolving the conflicts that arise when more than one device wants to use the bus to communicate at a time. The job of resolving such conflicts is left to bus arbitration circuitry. A system designer using the MC68000 family is in some luck. This series of microprocessors has a limited set of lines built in to allow for external circuitry to request and receive the bus from the processor. However, having given up the bus the processor does nothing to decide who receives the bus next. This is left to external arbitration circuitry. This paper describes a VLSI chip designed to perform bus arbitration for the Motorola MC68000 series of microprocessors. With such a module, several devices (such as DMA, I/O controllers, and multiple microprocessors) can share a single bus while our device handles all bus conflicts using a priority scheme. The device is flexible, programmable, and compatible with the MC68000 family's bus architecture and their support chips.<<ETX>>","PeriodicalId":119615,"journal":{"name":"Proceedings of SOUTHEASTCON '94","volume":"75 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"1994-04-10","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"1","resultStr":null,"platform":"Semanticscholar","paperid":null,"PeriodicalName":"Proceedings of SOUTHEASTCON '94","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/SECON.1994.324344","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
引用次数: 1

Abstract

Modern computer systems often are designed around a bus architecture. This, of course eliminates the need for complete point-to-point interconnection of all the devices attached to the bus. The major hurdle to this system is in resolving the conflicts that arise when more than one device wants to use the bus to communicate at a time. The job of resolving such conflicts is left to bus arbitration circuitry. A system designer using the MC68000 family is in some luck. This series of microprocessors has a limited set of lines built in to allow for external circuitry to request and receive the bus from the processor. However, having given up the bus the processor does nothing to decide who receives the bus next. This is left to external arbitration circuitry. This paper describes a VLSI chip designed to perform bus arbitration for the Motorola MC68000 series of microprocessors. With such a module, several devices (such as DMA, I/O controllers, and multiple microprocessors) can share a single bus while our device handles all bus conflicts using a priority scheme. The device is flexible, programmable, and compatible with the MC68000 family's bus architecture and their support chips.<>
查看原文
分享 分享
微信好友 朋友圈 QQ好友 复制链接
本刊更多论文
针对68000系列微处理器的VLSI总线仲裁模块的设计
现代计算机系统通常是围绕总线体系结构设计的。当然,这消除了连接到总线上的所有设备的完全点对点互连的需要。该系统的主要障碍是解决当多个设备同时使用总线进行通信时产生的冲突。解决这种冲突的工作留给总线仲裁电路。使用MC68000系列的系统设计人员运气不错。这一系列的微处理器有一组有限的线路,以允许外部电路请求和接收来自处理器的总线。然而,在放弃总线之后,处理器不做任何事情来决定下一个接收总线的人是谁。这是留给外部仲裁电路。本文介绍了一种用于摩托罗拉MC68000系列微处理器总线仲裁的VLSI芯片。使用这样的模块,多个设备(如DMA、I/O控制器和多个微处理器)可以共享单个总线,而我们的设备使用优先级方案处理所有总线冲突。该器件灵活、可编程,并与MC68000系列总线架构及其支持芯片兼容。
本文章由计算机程序翻译,如有差异,请以英文原文为准。
求助全文
约1分钟内获得全文 去求助
来源期刊
自引率
0.00%
发文量
0
期刊最新文献
The use of wavelet transform as a preprocessor for the neural network detection of EEG spikes An output unit for low frequency square wave electronic ballasts The IBM Personal Communicator-design considerations Accelerating conversations for fault-tolerant concurrent software Application of three dimensional image analysis to the mammalian cell nucleus
×
引用
GB/T 7714-2015
复制
MLA
复制
APA
复制
导出至
BibTeX EndNote RefMan NoteFirst NoteExpress
×
×
提示
您的信息不完整,为了账户安全,请先补充。
现在去补充
×
提示
您因"违规操作"
具体请查看互助需知
我知道了
×
提示
现在去查看 取消
×
提示
确定
0
微信
客服QQ
Book学术公众号 扫码关注我们
反馈
×
意见反馈
请填写您的意见或建议
请填写您的手机或邮箱
已复制链接
已复制链接
快去分享给好友吧!
我知道了
×
扫码分享
扫码分享
Book学术官方微信
Book学术文献互助
Book学术文献互助群
群 号:481959085
Book学术
文献互助 智能选刊 最新文献 互助须知 联系我们:info@booksci.cn
Book学术提供免费学术资源搜索服务,方便国内外学者检索中英文文献。致力于提供最便捷和优质的服务体验。
Copyright © 2023 Book学术 All rights reserved.
ghs 京公网安备 11010802042870号 京ICP备2023020795号-1