System synthesis and processor selection in the S/sup 3/E/sup 2/S environment

Abstract

This paper presents the synthesis technique available in S/sup 3/E/sup 2/S, a CAD environment to specify, simulate, and synthesize electronic systems that can be modeled as a combination of analog parts, digital hardware, and software. S/sup 3/E/sup 2/S is based on a distributed, object-oriented system model, where abstract objects are initially used to express complex behavior and may be later refined into digital or analog hardware and software. Finally, system synthesis is targeted to a set of complex processors, which can be either custom designed or off-the-shelf components. The environment selects processors that best match the desired application by analyzing processor and application characteristics. The paper explains the architecture selection process with some examples.